GATE PYQ

Computer Organization

Q161.
Consider a 32- bit processor which supports 70 instructions. Each instruction is 32 bit long and has 4 fields namely opcode, two register identifiers and an immediate operand of unsigned integer type. Maximum value of the immediate operand that can be supported by the processor is 8191. How many registers the processor has?

Q162.
A processor has 64 registers and uses 16-bit instruction format. It has two types of instructions: I-type and R-type. Each I-type instruction contains an opcode, a register name, and a 4-bit immediate value. Each R-type instruction contains an opcode and two register names. If there are 8 distinct I-type opcodes, then the maximum number of distinct R-type opcodes is _______.

Q163.
A data driven machine is one that executes an instruction if the needed data is available. The physical ordering of the code listing does not dictate the course of execution. Consider the following pseudo-code:A. Multiply E by 0.5 to get FB. Add A and B to get E C. Add B with 0.5 to get D D. Add E and F to get G E. Add A with 10.5 to get CAssume A,B,C are already assigned values and the desired output is G. Which of the following sequence of execution is valid?

Q164.
Consider a processor with 64 registers and an instruction set of size twelve. Each instruction has five distinct fields, namely, opcode, two source register identifiers, one destination register identifier, and a twelve-bit immediate value. Each instruction must be stored in memory in byte-aligned fashion. If a program has 100 instructions, the amount of memory(in bytes) consumed by the program text is _____ .

Q165.
Statements associated with registers of a CPU are given. Identify the false statement.

Q166.
The contents of the flag register after execution of the following program by 8085 microprocessor will beProgram SUB A MVI B,(01)H DCR B HLT

Q167.
A processor has 16 integer registers (R0, R1,...,R15) and 64 floating point registers (F0, F1,...,F63). It uses a 2-byte instruction format. There are four categories of instructions: Type-1, Type-2, Type-3, and Type-4. Type-1 category consists of four instructions, each with 3 integer register operands (3Rs). Type-2 category consists of eight instructions, each with 2 floating point register operands (2Fs). Type-3 category consists of fourteen instructions, each with one integer register operand and one floating point register operand (1R+1F). Type-4 category consists of N instructions, each with a floating point register operand (1F). The maximum value of N is __________.

Q168.
A non-pipelined CPU has 12 general purpose registers?(R0,R1,R2,...,R12). Following operations are supportedADD Ra, Rb, Rr Add Ra to Rb and store the result in RrMUL Ra, Rb, Rr Multiply Ra to Rb and store the result in RrMUL operation takes two clock cycles, ADD takes one clock cycle.Calculate minimum number of clock cycles required to compute the value of the expression XY+XYZ+YZ. The variable X,Y,Z are initially available in registers R0,R1 and R2 and contents of these registers must not be modified.

Q169.
In X=(M+NxO)/(PxQ), how many one-address instructions are required to evaluate it?

Q170.
Consider the following data path diagram. Consider an instruction: R0\leftarrow R1+R2. The following steps are used to execute it over the given data path. Assume that PC is incremented appropriately. The subscripts r and w indicate read and write operations, respectively. 1. \; R2_r,TEMP1_r,ALU_{add},TEMP2_w 2. \; R1_r,TEMP1_w 3. \; PC_r,MAR_w,MEM_r 4. \; TEMP2_r,R0_w 5. \; MDR_r,IR_w Which one of the following is the correct order of execution of the above steps?